June: p² Pack

What's the meaning of the abbreviation "p² Pack"?

The abbreviation p² Pack stands for "PCB Power Package" (p x p = p²). This technology can be used to embed power semiconductor modules for MOSFETs, IGBTs or Wide Band Gap semiconductors into the resin matrix of a PCB.
 

What is a p² Pack and what is it used for?

A p² Pack is a PCB-based semiconductor package. Such as comparable modules, the embedded power semiconductors can carry out specific switching tasks in the different topologies. The p² Pack is used wherever applications with conventional technologies such as packaged components or power modules reach their technological limits or are confronted with space problems.
 

What is a p² Pack-DSV and what is it used for?

The abbreviation DSV stands for Double Sided Vias. In this technology, the chip contact surfaces are connected directly to the laser vias. The p² Pack DSV is used in the medium output category which is not focused on maximum performance in heat dissipation and current carrying capacity but on a compact design.
 

What is a Smart p² Pack?

The p² Pack is a real power module where high currents are transferred through thick-copper layers. This semiconductor power module will be integrated in a logic board. This will create a PCB which offers both power and logic circuits. This combination is called a Smart p² Pack.
 

What are the advantages of the p² Pack?

  1. Optimised assembly and connection technology
    The DCB power electronics substrate and the logic board are now combined to give a PCB. This makes cables and plug-in connectors superfluous and improves reliability.
     
  2. Improved contact resistance of the power electronics
    Since in the p² Pack bondwires are replaced with copper-filled vias and the chip is then contacted on the surface of the top side, the forward power loss is reduced. The exact value depends on the particular technology generation of the semiconductor, the voltage class used and the semiconductor package to be compared.
     
  3. Improved thermal resistance
    The excellent heat spreading of the Smart p² Pack allows the overall RTH of the system to be significantly improved. First demonstrators have even shown advantages over DCB ceramics, even though DCB, for example with Al2O3, has a heat conductivity of 24 W/mK and the p² Pack works with prepegs, which only have 1.85 W/mK. In the future, optimised prepegs will be available, which will reinforce this advantage further.
     
  4. Low-inductive design
    The p² Pack allows primary dc-link capacitors or snubber networks to be taken significantly closer to their output stage, thus significantly reducing voltage overshoots during switching. Previous demonstrators have shown a decrease in parasitic inductance of up to 85%.
     
  5. Improved switching behavior and more rapid switching possible
    The almost superficial connection of the chip top side to the vias allows quicker switching, resulting in smaller passive components being required, thus saving system costs.
     
    Moreover, the p² Pack shows significantly fewer overshoots during switch-on and switch-off. This results, for example, in 48 volt systems being usable nowadays with 80 V MOSFETs and no longer requiring a 100 volt junction voltage. 80 volt MOSFETs have a correspondingly lower RDS(ON). A smaller RDS(ON) and lower switching losses lead to a lower power loss, thus clearly lowering the maximum chip temperature with the same operating mode. It is up to the user whether he/she wants to use this advantage for a longer life, a lower cooling system expenditure or for a lower chip size.
     
  6. Improved electromagnetic compatibility (EMC)
    The fact that the power electronic semiconductor is shielded by two copper layers improves the electromagnetic compatibility. This should make it possible to reduce the EMC protective measures. This affects only some applications. Here it is up to the customer to decide to what extent this advantage is relevant for him.
     
  7. Built-in insulation
    As a general rule, today thermal interface materials (TIM) are used between the PCBs and the heat sinks.
    They usually have a heat conductivity of approx. 2 W/mk. However, this value often lowers the overall performance of the design. Since the p² Pack is already insulated, other optimized TIM of 2-20 W/mK can be used, which should significantly improve overall performance.
     
  8. Miniaturisation
    Many systems for today's and future applications must get smaller and smaller and, at the same time, provide additional functionalities. The p² Pack technology allows valuable space to be saved already in the PCB solutions. In the demonstrator shown, developed by SCHWEIZER together with Infineon, the size of the PCBs for the accessory drive, for example, could be reduced by approx. 15 percent compared to conventional solutions.
     
  9. Increased reliability
    The use of bonding wires or DCB ceramics substantially increases reliability. In thermal cycle tests with a temperature differential ∆T of 120 K, designs were able to master more than 700,000 active cycles.
     
  10. Reduction in system costs
    The saving of plug-in connectors and cables, lower cooling measures, the reduction in the required chip surfaces of the power components, smaller passive components, reduced EMC measures and the insulation already in place, as well as the saving of space overall result in a significant saving of system costs.
     


Which currents could be achieved with the p² Pack technology?

Depending on the semiconductors used and the performance capability of the cooling system, continuous currents of 400 amperes can be transferred.
 

How many logic layers can be realised in a Smart p² Pack?

6 logic layers are reasonable. But even more layers can be realised.
 

When will the first p² Packs be available?

We have scheduled the series start of the technology in dedicated projects for 2019/2020.
 

How will the p² Pack be integrated in the PCB design?

SCHWEIZER has established design guidelines for the development of the p² Pack technology. During the construction phase of a PCB using the p² Pack technology, we will support your development team. The implementation in the planning tool does not require special plugins.
 

What are the costs for the p² Pack technology compared to modules?

The costs for the p² Pack technology cannot be compared directly with a module. The costs for the entire system must be considered. In the entire system, we expect a reduction of the system costs (see question "Advantages of the p² Pack").